From Amdahl’s Law to Memory-Wall: How do we utilize memory systems in the big data era?

Prof. Dr. Xian-He Sun, Illinois Institute of Technology, Chicago, USA

14 Jun 2019, 15:30–17:00; Location: S4|10-1

Amdahl’s law states that parallel processing gain will diminish quickly if problem size does not increase with the computing power. Memory-wall problem clams that data access is the performance bottleneck for data intensive applications; whereas big data applications are all data-centric applications. Data access becomes THE performance concern of computing. In this talk, we first give a short review of the concept of Amdahl’s law and memory-wall, we then introduce a new thought on memory system design based on concurrent data access. We present the Concurrent-AMAT (C-AMAT) data access model to quantify the unified impact of data locality, concurrency and overlapping (latency hiding) and introduce the pace-matching data-transfer design methodology, to utilize memory system performance. A global management system, named Layered Performance Matching (LPM), is then developed to optimize the overall performance of memory systems. C-AMAT shows that data access concurrency is as important as data access locality, but its main contribution is on latency hiding, not on bandwidth increase, which is harmfully underutilized in current system design. Experimental testing confirms our theoretical findings, with a 150x reduction of memory stall time.


Bio-Short version

Dr. Xian-He Sun is a University Distinguished Professor of Computer Science at the Department of Computer Science in the Illinois Institute of Technology (IIT). He is the director of the Scalable Computing Software laboratory at IIT and a guest faculty in the Mathematics and Computer Science Division at the Argonne National Laboratory. Before joining IIT, he worked at DoE Ames National Laboratory, at ICASE, NASA Langley Research Center, at Louisiana State University, Baton Rouge, and was an ASEE fellow at Navy Research Laboratories. Dr. Sun is an IEEE fellow and is known for his memory-bounded speedup model, also called Sun-Ni’s Law, for scalable computing. His research interests include data-intensive high-performance computing, memory and I/O systems, software system for big data applications, and performance evaluation and optimization. He has over 250 publications and 6 patents in these areas. He is the Associate Editor-in-Chief of the IEEE Transactions on Parallel and Distributed Systems, a Golden Core member of the IEEE CS society, a former vice chair of the IEEE Technical Committee on Scalable Computing, the past chair of the Computer Science Department at IIT, and is serving and served on the editorial board of leading professional journals in the field of parallel processing. More information about Dr. Sun can be found at his web site www.cs.iit.edu/~sun/.

Category: CE Seminar


Technische Universität Darmstadt

Graduate School CE
Dolivostraße 15
D-64293 Darmstadt

Phone+49 6151/16-24401
Fax -24404

to assistants' office

Open BSc/MSc Theses

Show a list of open BSc/MSc topics at GSC CE.

 Print |  Impressum |  Sitemap |  Search |  Contact |  Privacy Policy
zum Seitenanfangzum Seitenanfang